Synchronization and Arbitration in Digital Systems

"Synchronization and Arbitration in Digital Systems" by David J. Kinniment(auth.), published by John Wiley & Sons, Ltd. Written by one of the foremost researchers in this area of digital design, this authoritative text provides in-depth theory and practical design solutions for the reliable working of synchronization and arbitration hardware in digital systems. The book provides methods for making real reliability measurements both on and off chip, evaluating some of the common difficulties and detailing circuit solutions at both circuit and system levels. Synchronization and Arbitration in Digital Systems also presents: mathematical models used to estimate mean time between failures in digital systems; a summary of serial and parallel communication techniques for on-chip data transmission; explanations on how to design a wrapper for a locally synchronous cell, highlighting the issues associated with stoppable clocks; an examination of various types of priority arbiters, using signal transition graphs to show the specification of different designs (from the simplest to more complex multi-way arbiters) including ways of solving problems encountered in a wide range of applications; essential information on systems composed of independently timed regions, including a discussion on the problem of choice and the factors affecting the time taken to make choices in electronics. With its logical approach to design methodology, this will prove an invaluable guide for electronic and computer engineers and researchers working on the design of digital electronic hardware. Postgraduates and senior undergraduate students studying digital systems design as part of their electronic engineering course will struggle to find a resource that better details the information given inside this book.Content: Chapter 1 Synchronization, Arbitration and Choice (pages 1–10): Chapter 2 Modelling Metastability (pages 11–38): Chapter 3 Circuits (pages 39–58): Chapter 4 Noise and its Effects (pages 59–67): Chapter 5 Metastability Measurements (pages 69–100): Chapter 6 Conclusions Part I (pages 101–102): Chapter 7 Synchronizers in Systems (pages 103–141): Chapter 8 Networks and Interconnects (pages 143–181): Chapter 9 Pausible and Stoppable Clocks in GALS (pages 183–192): Chapter 10 Conclusions Part II (pages 193–195): Chapter 11 Arbitration (pages 197–208): Chapter 12 Simple Two?Way Arbiters (pages 209–223): Chapter 13 Multi?Way Arbiters (pages 225–233): Chapter 14 Priority Arbiters (pages 235–251): Chapter 15 Conclusions Part III (pages 253–254): Book details: 266 pages, published 2007. Order now on BookShops.in with fast, reliable delivery across India.